This circuit allows you to directly combine any decoder/receiver with any converter without re-sampling, oversampling or filtering ICs in between. You only have to figure out how much shifting is required for left and right channel DATA.
Below you'll find some examples for Philips I2S signals and for the format that's available from Sony decoders
Explanations to the circuit
Sig$3: serial DATA comming from decoder/reciever
Sig$4: BCK comming from decoder/reciever
Sig$14: LRCK comming from decoder/reciever
Sig$7: shifted right channel DATA going to converters
Sig$9: shifted right channel inverted DATA going to converters
Sig$10: shifted left channel DATA going to converters
Sig$11: shifted left channel inverted DATA going to converters
Sig$12: BCK going to converters
Sig$15: LRCK going to converters
Sig$5: shifted right channel DATA coming from shifter
Sig$6: shifted left channel DATA coming from shifter
Sony decoder
| Delay | Sig$5 | delay | Sig$6 | |
| 16bit DAC | 24 | IC3 / Q7 | 48 | IC6 / Q7 |
| 18bit DAC | 22 | IC3 / Q5 | 46 | IC6 / Q5 |
| 20bit DAC | 20 | IC3 / Q3 | 44 | IC6 / Q3 |
| 24bit DAC | 16 | IC2 / Q7 | 40 | IC5 / Q7 |
Philips decoder
| Delay | Sig$5 | delay | Sig$6 | |
| 16bit DAC | 15 | IC2 / Q6 | 47 | IC6 / Q6 |
| 18bit DAC | 13 | IC2 / Q4 | 45 | IC6 / Q4 |
| 20bit DAC | 11 | IC2 / Q2 | 43 | IC6 / Q2 |
| 24bit DAC | 7 | IC1 / Q6 | 39 | IC5 / Q6 |
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